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dc.contributor.authorSilva, Bruno Almeida da-
dc.contributor.authorLima, Arthur Mendes-
dc.contributor.authorArias Garcia, Janier-
dc.contributor.authorHuebner, Michael-
dc.contributor.authorSilva, Jones Yudi Mori Alves da-
dc.date.accessioned2021-11-10T12:16:43Z-
dc.date.available2021-11-10T12:16:43Z-
dc.date.issued2021-10-27-
dc.identifier.citationSILVA, Bruno A. da et al. A manycore vision processor for real-time smart cameras. Sensors, v. 21, n. 21, 7137, 2021. DOI: https://doi.org/10.3390/s21217137. Disponível em: https://www.mdpi.com/1424-8220/21/21/7137. Acesso em: 1 nov. 2021.pt_BR
dc.identifier.urihttps://repositorio.unb.br/handle/10482/42348-
dc.descriptionThis paper is an extended version of our paper published in —X Braziliam Symposium on Computing Systems Engineering—https://doi.org/10.1109/SBESC51047.2020.9277867.pt_BR
dc.language.isoInglêspt_BR
dc.publisherMDPIpt_BR
dc.rightsAcesso Abertopt_BR
dc.titleA manycore vision processor for real-time smart cameraspt_BR
dc.typeArtigopt_BR
dc.subject.keywordMultiprocessadores em chippt_BR
dc.subject.keywordProcessamento de imagenspt_BR
dc.subject.keywordVisão por computadorpt_BR
dc.subject.keywordCâmera inteligentept_BR
dc.rights.licenseCopyright: © 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/).pt_BR
dc.identifier.doihttps://doi.org/10.3390/s21217137pt_BR
dc.description.abstract1Real-time image processing and computer vision systems are now in the mainstream of technologies enabling applications for cyber-physical systems, Internet of Things, augmented reality, and Industry 4.0. These applications bring the need for Smart Cameras for local real-time processing of images and videos. However, the massive amount of data to be processed within short deadlines cannot be handled by most commercial cameras. In this work, we show the design and implementation of a manycore vision processor architecture to be used in Smart Cameras. With massive parallelism exploration and application-specific characteristics, our architecture is composed of distributed processing elements and memories connected through a Network-on-Chip. The architecture was implemented as an FPGA overlay, focusing on optimized hardware utilization. The parameterized architecture was characterized by its hardware occupation, maximum operating frequency, and processing frame rate. Different configurations ranging from one to eighty-one processing elements were implemented and compared to several works from the literature. Using a System-on-Chip composed of an FPGA integrated into a general-purpose processor, we showcase the flexibility and efficiency of the hardware/software architecture. The results show that the proposed architecture successfully allies programmability and performance, being a suitable alternative for future Smart Cameras.pt_BR
dc.identifier.orcidhttps://orcid.org/ 0000-0001-5203-3048pt_BR
dc.identifier.orcidhttps://orcid.org/ 0000-0002-1790-3869pt_BR
dc.identifier.orcidhttps://orcid.org/ 0000-0001-6707-853Xpt_BR
dc.contributor.affiliationUniversity of Brasilia, Departamento de Engenharia Mecânica, Automation and Control Groupen
dc.contributor.affiliationUniversity of Brasilia, Departamento de Engenharia Mecânica, Automation and Control Groupen
dc.contributor.affiliationFederal University of Minas Gerais, Department of Electronic Engineering, Graduate Program in Electrical Engineeringen
dc.contributor.affiliationTechnical University Brandenburg, Computer Engineering, Germanyen
dc.contributor.affiliationUniversity of Brasilia, Departamento de Engenharia Mecânica, Automation and Control Grouppt_BR
dc.description.unidadeFaculdade de Tecnologia (FT)pt_BR
dc.description.unidadeDepartamento de Engenharia Mecânica (FT ENM)pt_BR
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